1. Technical Field
The present disclosure relates to semiconductor device manufacturing apparatuses, and more particularly, to a semiconductor device manufacturing apparatus for performing diffusion and deposition processes and to a wafer loading/unloading method thereof.
2. Description
A semiconductor device is generally manufactured through selective and repeated processes such as, for example, a photo, etching, diffusion, chemical vapor deposition, ion implantation, metal deposition on a wafer.
In the above-mentioned diffusion process, a process of diffusing impurity of a desired conductive type is performed on a wafer in a high-temperature atmosphere.
A semiconductor manufacturing apparatus performing the diffusion process may be employed to thermally diffuse conductive impurity such as, for example, phosphorus into a single crystal silicon or polysilicon at about 700° C. or more, or to heat the wafer in an oxygen atmosphere, thereby obtaining a thermal oxide layer, or to perform annealing and baking etc. Further, the semiconductor manufacturing apparatus may be used to get a deposition layer such as, for example, polysilicon layer and silicon nitride layer through a deposition process.
Such semiconductor manufacturing apparatuses undergoing diffusion and deposition processes are almost used as a batch type to process a plurality of wafers once in view of productivity. In the batch-type semiconductor manufacturing apparatus, relatively more wafers should be loaded within one reaction tube to cut down on production costs.
A semiconductor manufacturing apparatus according to the conventional art is described as follows, referring to the accompanied drawings.
FIG. 1 is a sectional view schematically illustrating a semiconductor manufacturing apparatus according to the conventional art.
With reference to FIG. 1, a conventional semiconductor manufacturing apparatus includes a reaction tube 10 having a bell shape, a heater 20 adapted surrounding the external part of reaction tube 10 to heat the interior of the reaction tube 10, a plate 30 raised from a lower part of the reaction tube 10 to seal up the reaction tube 10, and a boat 40 for loading with an equal interval a plurality of wafers 12 in an upper center part of the plate 30.
The semiconductor manufacturing apparatus may further include a reaction gas supplier for supplying reaction gas into the reaction tube 10, and an exhauster for exhausting gas after completing a corresponding process within the reaction tube 10.
In the boat 40, a plurality of slots 42 are formed to support with an equal interval, back faces 12b of the plurality of wafers 12 so that front faces 12a of the plurality wafers 12 are directed upward. The slot 42 is formed in a flute shape into which an outer circumference face of the wafer 12 is inserted, at a position that a gravity center of the wafer 12 corresponds to a center of the boat 40 within the boat 40, or in a shape the back face 12b of an edge of the wafer 12 can be loaded. The back faces 12b of the wafers 12 are supported by the plurality slots 42. For example, the wafer 12 may be supported by the plurality of slots 42 formed with an azimuth of about 120° within the boat 40.
That is, the boat 40 is formed as a single individual having plurality slots 42 in which a plurality of wafers 12 are inserted or loaded with a uniform interval in a stack structure. For example, the boat 40 is formed to load the wafers 12 of about 70 to about 150 sheets with a uniform interval therebetween, the wafer 12 having a diameter of 300 mm.
However, here the plurality of wafers 12 are stacked in one direction. Thus, for example, when the wafers are stacked below an appropriate interval, an error in corresponding diffusion and deposition processes may be caused or an error in a wafer loading/unloading operation may be caused. When a plurality of wafers 12 are loaded into the boat 40 with an interval of about 7.5 mm or below, it may be difficult to provide uniformity in the deposition process. Further, when the interval between the plurality of wafers 12 is lessened to 7.5 mm or below, an alignment margin between the wafers 12 and a blade of transfer robot loading/unloading the wafers 12 may not increase, thereby causing damage or scratches on the wafers 12.
In other words, in a semiconductor manufacturing apparatus according to the conventional art, a diffusion layer or deposition layer of given thickness can be formed on front faces 12a and back faces 12b of the plurality wafers 12 by loading with the same interval the plurality of wafers 12 having horizontal level within the boat 40 in which a plurality of slots 42 are formed with the same interval therebetween.
As described above, a semiconductor manufacturing apparatus according to the conventional art may have the following difficulties.
First, relatively more wafers 12 may not be loaded as the wafers 12 should be loaded limited within the boat 40 having a plurality of slots 42 formed to support back faces 12b of plurality wafers 12, thereby decreasing productivity.
Secondly, when an interval between plurality wafers 12 loaded in the boat 40 is reduced to below a proper level, damage and scratches on the wafers 12 may be caused due to a collision between a blade of transfer robot and the wafers 12, thereby decreasing a production yield.